The invention relates to a thyristor having MIS-FET structures arranged at a boundry surface of a four layer semiconductor member. The MIS-FET structures are arranged as controllable emitter short-circuit paths.
Thyristors of this type are known from U.S. Pat. No. 3,243,669, particularly FIG. 9, and from German Letters Pat. No. 26 25 917, both incorporated herein by reference. They exhibit MIS-FET structures which respectively consist of a first semiconductor zone of a first conductivity type connected with a first electrode of the thyristor. A second semiconductor zone of the first conductivity type is connected with a base layer bordering on the respective emitter. A semiconductor zone of the second conductivity type is disposed between the latter semiconductor zones, which semiconductor zones are covered by a gate electrically insulated with respect to the semiconductor member. Running over these structures are emitter short-circuit paths which are controllable via the gates of the structures. In U.S. Pat. No. 3,243,669, the emitter short-circuit paths are switched on merely for the purpose of quenching the thyristor. In German Letters Pat. No. 26 25 917, they are switched on for the purpose of quenching as well as during the supply of an ignition pulse in order to prevent an ignition of the thyristor.
Additional thyristors with controllable emitter shortcircuit paths are described, for example, in the German patent applications Nos. P 29 45 366.5 and P 29 45 324.5, both incorporated herein by reference.
In order to effectively short-circuit the pn-junction between the emitter and the adjoining base layer it is advantageous in the case of the above-cited thyristors to design the controllable emitter short-circuit paths to be as large in surface area as possible. For this purpose, the emitter is divided into several emitter partial zones which are then respectively completely, or almost completely surrounded by MIS-FET structures. However, the particular portion of the thyristor cross-section which is allotted to the interstices between the individual emitter partial zones and to the MIS-FET structures cannot take over any load current fraction in the onstate of the thyristor.